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FPGA 101 : Synchronizer

Apr 5, 2018adminTutorialFPGA, HDL, meta-stability, RTL, synchronizer, system verilog, verilog

Learn the concept of synchronizer in digital system design!

FPGA 101 : Finite-State Machine

Apr 3, 2018adminTutorialFPGA, FSM, HDL, Mealy, Moore, RTL, system verilog, verilog

Learn How to model a state machine using verilog or system-verilog!

Part III : First Prototype Design

Jan 20, 2018adminProjectDAC, esp8266, espressolite2.0, pcb, power module, power supply, prototype, PSU, schematic

This post explains the design of first prototype and its validation outline.

FPGA 101 : Combinational Logic

Jan 19, 2018adminTutorialAdder, Combinational Logic, Encoder, FPGA, HDL, Multiplexer, RTL, system verilog, verilog

Learn How to model a combinational logics using verilog or system-verilog!

FPGA 101 : D Flip-flop

Dec 13, 2017adminTutorialD-flip flop, FPGA, HDL, RTL, system verilog, verilog

Learn How to model a D flip-flop using verilog or system-verilog!